Tilottoma barua_Msc_thesis_PFW.pdf (3 MB)

DATA TRANSFER PERFORMANCE ANALYSIS FROM PROGRAMMABLE LOGIC TO PROCESSING SYSTEM OF ZYNQ 7000

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thesis
posted on 30.07.2020 by Tilottoma Barua
Field Programmable Gate Arrays(FPGAs) were invented in the 1980s. Since then the use of FPGAs in many fields has been growing rapidly. Due to the inherent reconfiguration and relatively low development cost FPGA technology has become one of the important components in data processing and communication system.
The recent development of computing technology affects not only the software but also requires integrating and utilizing a custom logic design on a dedicated hardware platform.
In this context,this research work analyzes and compares on-chip interfaces of HW/SW communication in the Zynq-7000 all programmable SoC based platform. Several experiments were carried out to evaluate the performance of data communication between the processing system and programmable logic through general purpose(GP), high performance ports (HP) and accelerator coherency port (ACP). The results identified the most effective interfaces for transferring data from the PL to PS and store the data to DRAM memory.
One conclusion of this work is that, the selection of suitable ports depends on application requirements. For low-bandwidth application GP port is appropriate. For high-speed applications, the high performance port(HP) and Accelerator Coherency Port (ACP) are suitable and works better.The results of this thesis are useful in high performance embedded system design.


History

Degree Type

Master of Science

Department

Electrical and Computer Engineering

Campus location

Fort Wayne

Advisor/Supervisor/Committee Chair

Dr. Todor Cooklev

Additional Committee Member 2

Dr. Chao Chen

Additional Committee Member 3

Dr. Yanfei Liu

Licence

Exports